Dynamic random access memory (DRAM) is used in a variety of electronic devices. DRAM is a kind of volatile memory. In other words, DRAM may lose its data storage status when the power is turned off. A DRAM cell saves data by storing charges on its capacitor, and the charges on the capacitor may gradually decay over time, so that it needs refresh periodically in order to maintain the validity of internal data.
The refresh operation not only increases power consumption of a memory, but also prohibits the system to access the memory. The system becomes idle and waits until the refresh operation is finished, which results in low computing efficiency. As memory capacity increases continuously, the refresh time of the memory block is also increasing. The memory itself cannot determine the validity of internal data in its memory blocks, thus the memory needs to communicate with a memory controller to update information about the validity of internal data in its memory blocks in time.